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12th June 2015, 11:33 AM
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Join Date: Apr 2013
Re: Joycee IIT Gandhinagar

Joycee M. Mekie is the assistant professor at IIT Gandhinagar under Electrical Engineering department of the institute .

Education qualification detail of the Joycee M. Mekie:

B.E.: M. S. University of Baroda, 1997
M.E.: M. S. University of Baroda, 1999
Ph.D.: IIT Bombay, 2009


Research Interests:
VLSI Design
Asynchronous circuit design

Work Experience
Assistant Professor, Indian Institute of Technology, Gandhinagar, (Dec. 2009 to present)

Assistant Professor, Electrical Engg. Dept. M. S. University of Baroda, (Jun 2007 - Dec 2009)


Recent Publications

S. Chakraborty, J. Mekie and D. K. Sharma, March 2006, "Reasoning about Synchronization using Abstract Timing Diagrams," in Special Issue on Formal Methods for Globally Asynchronous Locally Synchronous (GALS) Systems, Formal Methods in System Design (FMSD), pp. 153-169, Vol. 28, No. 2.

J. Mekie, S. Chakraborty, G. Venkataramani, P. Thiagarajan and D. K. Sharma, March 2006, "Interface Design for Rationally Clocked GALS Systems," in Proc. of ASYNC, pp. 160-171.


Contact detail :
Joycee M. Mekie
Email: joycee@iitgn.ac.in


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