Manish Kumar NERIST

hello sir I have heard a lot about the Manish kumar of North Eastern Regional Institute of science and technology (NERIST). Can you please tell me the details about the Manish kumar of North Eastern Regional Institute of science and technology (NERIST) because I want to know about this person?

I took admission in North Eastern Regional Institute of Science and Technology NERIST and from here doing master degree. Will you provide details about Manish Kumar NERIST along with Area of specialization also provide list of Sponsored Research Projects done by him?

[pawan]

Dr. Manish Kumar is the Assistant Professor at NERIST

Area of specialization:


Low Power VLSI design; Digital Electronics

Sponsored Research Projects

Topic Funding Agency Year
Low Power High Speed VLSI Design in Deep Submicron Technology Institution of Engineers (India), Kolkata 2009-10
Worked in -Development of Wireless Communication System for Underground Mines- Ministry of Communications and Information Technology, New Delhi and Mahanadi Coalfields Limited, Sambalpur 2004-2005

List of some publications:


-Kumar, M., Hussain, Md. A., and Singh, L.L. K.-, -Design of a Low Power High Speed ALU in 45nm Technology Using GDI technique and its Performance Comparison-, -Springer Verlag Lecture Notes in Computer Science: Communications in Computer and Information Science-, -1680-0737-, -DOI: 10.1007/978-3-642-19542-6-.

-Power Dissipation and Switching Speed Analysis of a CMOS Full adder in Deep Submicron and Nanoscale Technologies-, -Journal on Electronics Engineering-, -2229-7286-.

-Kumar, M.-, -Realization of a Low Power High Performance IC Design Technique for Wireless Portable Communication Devices used in Underground Mines-, -IP Multimedia Communications-, -0975- 8887-.

Kumar, M., Hussain, Md. A., and Paul, S. K., -Performance of a Two Input NAND Gate Using Subthreshold Leakage Control Techniques-, -Journal of Electron Devices,-1682-3427,
Kumar, M., Hussain, Md. A., and Paul, S. K.- , -New Improved Hybrid Digital Circuit Design Techniques for Reducing Subthreshold Leakage Power in Standby Mode-, Circuits and Systems-, -2153-1293-, DOI:10.4236/cs.2013.41012-

Contact:


e-mail:mkr [AT] nerist(dot)ac(dot)in; er.manish.k[AT]gmail(dot)com,
Phone(EPBX/Office):91-360-2257401-11[Extn. 6236]; 9774335528(M)