#1
30th November 2014, 03:35 PM
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ISRO after B.Tech 2nd Year
Can you tell me how to enter in ISRO (Indian Space Research Organization) after passing B.Tech 2nd year?
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#2
1st December 2014, 10:48 AM
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Re: ISRO after B.Tech 2nd Year
There is plenty of scope of Engineers in ISRO. To join ISRO you have to complete the B.Tech course. You will only be selected after completion of B.Tech course. Once you have done that, you can appear for ISRO entrance exam. The detail of the exam is generally released in February or March. Eligibility 1. You must be Indian citizen. 2. A B.Tech degree from a recognized university. 3. At least 60 percent marks in Engineering graduation. 4. There is some relaxation in percentage for reserve category. 5. The age limit is 21 to 30 years. 6. Up to 5 years relaxation in age limit for SC/ST. 7. Candidates in the final year of Engineering may also apply but on the condition that they should be able to submit the degree at the time of interview. 8. Although it is not mandatory but you should also appear for GATE entrance exam prior of applying to ISRO. The space organization gives importance to candidates with good GATE score. Entrance Exam Pattern: There will be an objective type paper divided into two parts for each subject as given below: Physics Chemistry and Mathematics Syllabus of Study: For Refrigeration and Air Conditioning: Advanced Thermodynamics Advanced Heat Transfer Instrumentation of Thermal Systems Applied Mathematics for Thermal Engineers For Civil Engineering: Surveying Structural Engineering Transportation Engineering Geotechnical Engineering Engineering Mathematics Environmental Engineering etc. Selection Process: 1) Entrance Exam 2) Interview ISRO Question Paper 1) Special software to craete a job queue is called a) driver b) spooler c) interpreter d) linkage editer 2)When a process is rolled back as a result of deadlock the difficulty arises is a) Starvation b) System throughput c) low device utilization d) cycle stealing 3)On recieving an interrupt from an I/O device the CPU a) Halts for a predefined time. b) Branches off the interrupt service routine after completion off the current instruction. c) Branches off to the interrupt service routine immediately. d) hands over the control of address bus and data bus to the interrupting service. 4) Which of the following is true of the auto increment addressing mode? 1. It is useful in creating sef relocating code. 2)If it is induced in an instruction set architecture , than an additional ALU is required for effective address calculation. 3) The amount of increment depends on the size of the data item accessed. a) 1 only. b)2 only c) 3 only d) 2 and 3 only 5) Theprimary purpose of an operating system is a) To make the most efficient use of the computer hardware. b) to allow people to use the computer. c) To make the system programmers employed. d) to make computers easy to use. 6)consider the cpu intensive processes which require 10,20,30 time units and arrive at time 0,2,6 respectively.how many context switches are needed if the operating system impements a shortest remaining time first sceduling algorithm?Do not count the context switches at the time 0 and end. a) 1 b) 2 c) 3 d) 4 7) consider a system having n resources of the same type.These resources are shared by 3 processes A,B,C .These have peak demands of 3,4,6 respectively.For what value of n deadlock won't occour. a) 15 b) 9 c) 10 d) 13 8) In which addressing mode the effective address of the operand is computed by adding a constant value to the content of the register? a) absolute mode. b) indirect mode c) immediate mode d) index mode 9)the process of organizing the memory into two banks to allow 16 bit and 8 bit data operation is called a) bank switching b) indexed mapping c) two way memory interleaving d) memory segmentation 10)a one dimensional array A has indices 1-75.Each element is a string and takes up three memory words. The array is stored in location 1120 decimal. The starting address of A[49] is a) 1267 b) 1164 c) 1264 d) 1169 11) The microsystems stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields : a microoperation field of 13 bits, a next address field(X), and a MUX select field(Y). There are 8 status bits in the inputs of the MUX.How many bits are there in the X and Y fields and what is the size of the control memory in number of words? a) 10,3,1024 b) 8,5,256 c) 5,8,2048 d) 10,3,512 12)The use of multiple register windows with overlap causes a reduction in the number of memory accesses for 1.function locals and parameters 2. register saves and restores. 3. instruction fetches. a) 1 only b) 2 only c) 3 only d) 1,2,and 3 13)Which of the following about relative addressing mode is false? a) it enables reduced instruction size. b) it allows indexing of array element with same instruction. c) it enabkles easy relocation of data. d) it enables faster address calculation than absulute addressing. 14)Substitution of values for names (whose values are constants) is done in ' a) local optimization b) loop optimization c) constant folding d) strength reduction 15)A root a of eq f(x)=0 can be computed to any degree of accuracy if a good initial approximation x0 is chosen for which a) f(x0)>0 b) f(x0)f''(x0)>0 c) f(x0)f''(x0)<0 d) f''(x0)>0 16) consider the polynomial p(x)=a0+a1x+a2x*x+a3x*x*x. The mininum number of multipliations needed to evaluate p on an input x is a) 3 b) 4 c) 6 d) 9 17)Activities which ensure that the software that has been built , is tracable tocustomer is covered as part of a) verification b) validation c) maintainnace d) modeling 18) A testing method which is normally used as the acceptance test for a software system is a) regression testing b) integration testing c) unit testing d) system testing 19)A locked database file cab be a) accessed by only one user b) modified by the users with the correct password. c) used to hide the sencitive information. d) updated by more than one user |
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