|
#2
11th April 2016, 08:37 AM
| |||
| |||
| Re: IIT Delhi IEC
The IEC gathering is included in standalone and also cooperative reasearch incorporating different fields like VLSI Design, Analog Circuit Design, Artificial Neural Networks, Fault-tolerant Design, Microelectronics and Power Devices, Digital Signal Processing, and so on. The gathering contributes effectively to the Memorandum of Understanding between IIT delhi and driving reasearch associations in the nation like the Central Electronics Engineering Research Institute, Pilani (CEERI) and Defense Research and Development Organization (DRDO) and also various industry pioneers in VLSI outline. Affirmations Admissions to M Tech IEC project are directed amidst June. The project is offered in taking after two modes: Full Time Students Intake: Understudies with a Bachelors level Engineering degree in Electrical/Electronics/Instrumentation Engineering or Computer Science and Engineering, or a Master of Science degree in Electronics are qualified for induction into the IEC Program. Two classifications of understudy admission are quickly reasonable: Students are chosen in view of their GATE score and inside determination methods of IIT Delhi. In this manner, the employees talk with short-recorded hopefuls. All conceded understudies are qualified for the organization assistantship that is in no time Rs.8000/ - p.m. Workers of the supporting association can be conceded subject to their execution in the choice meeting. These hopefuls are not paid assistantship by the foundation. Part Time Students Intake: VLSI and EDA organizations situated in Delhi or in bordering towns (greatest separation 30 Kms.) can support its workers in the low maintenance mode. Choice is by talking the competitors and the understudies. The Course Details for IEC are as follows:  Contact Details: Web Master Dr. Shouribrata Chatterjee Ph:+91 11 2659 1099 email id: shouri[AT]ee.iitd.ac.in Web Maintenance Rajat Vishnoi email id: eez122067[AT]ee.iitd.ac.in |