AMBA AXI4-stream protocol specification

Hello sir I want to know about the AMBA AXI4-stream protocol specification so please provide me detailed information about this protocol.

[Shaleen]

AMBA AXI4 (Advanced extensible Interface 4) is the fourth generation of the AMBA interface specification from ARM.

AMBA AXI4 Interface Protocol

Ultimate Productivity for FPGA Logic Design with AXI4

Vivado Design Suite 2014 and ISE® Design Suite 14 extends the

Xilinx platform design methodology with AXI4 Compliant Plug-and-Play IP

Improved Productivity: Standards-based AXI4 IP makes IP integration easier and provides high performance and efficiency

Flexibility: Supports Embedded, DSP and Logic Edition users

Availability: AXI4-based IP for UltraScale 7-Series, Zynq®-7000,

Virtex-6 and Spartan®-6 available today from Xilinx and ecosystem partners

Higher Productivity

Consolidates broad array of interfaces into one (AXI4), so users only need to know one family of interfaces

Makes integrating IP from different domains, as well as developing your own or 3rd party partner IP easier

Saves design effort because AXI4 IP are already optimized for the highest performance, maximum throughput and lowest latency

Greater Flexibility

Supports Embedded, DSP and Logic Edition users

Tailor the interconnect to meet system goals: Performance, Area, and Power.

Enables you to build the most compelling products for your target markets

Broad IP Availability

Xilinx worked closely with ARM to define the AXI4 specification for high-performance FPGA-based systems and designs.

As part of our commitment to AXI4, Xilinx has adopted AXI4 as our next-generation IP interconnect standard for UltraScale, 7-Series, Zynq-7000, Spartan-6, Virtex-6 and future device families going forward