#1
2nd January 2017, 05:24 PM
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UPTU VLSI Question Papers
Hi I want the Dr. A.P.J. Abdul Kalam Technical University, Lucknow previous VLSI question paper for the B.Tech 7th semester so if you are having the same please provide me??
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#2
3rd January 2017, 09:34 AM
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Re: UPTU VLSI Question Papers
Well the Dr. A.P.J. Abdul Kalam Technical University, Lucknow formerly Uttar Pradesh Technical University and I have provided you the B.Tech 7th semester previous VLSI question paper so you can have a look (EM. VID (ODD SEM.) Theory Examinaxion, 2OI4-15 Attempt any four parts of the following : 5x4 (a) Define VLSI design methodology (Y Chart) and MOS Scaling. (b) Explain the CAD Tools for VLSI Design' (c) Discuss the classification of CMOS digital logic families. (d) Draw a 4x1 Multiplexer using Traasmission Gate (TG). (e) For an n channel MOS transistor with F,, = 6ocm'galr-r , cr*=7'lo-8 Ff cmz , W--2A;tm, L=2W and VTO=7'AV' Examine the relationship between the drain current and the terminal voltages (0 Explain the CMOS inverter switching characteristic and explain the definitions oi delays and transition times. Attempt any two parts of the following : lOxZ (a) Enlist the Layout design process and design rules of CMOS circuit. Draw a stick diagram of CMOS NOR gate. Consider a CMOS inverter circuits with the following parameters Vnn : 3.3V, VTon : 0.6V, Vrop: -0.7V, kn : 2A0pA lln, ko : 80 pAltfl, kp: 2.5 Calcuiate the noise margin of the circuits. UPTU VLSI Question Papers Address: Dr. A.P.J. Abdul Kalam Technical University IET Campus, Sitapur Road, Lucknow, Uttar Pradesh 226021 Phone: 0522 273 2193 [MAP]Dr. A.P.J. Abdul Kalam Technical University Uttar Pradesh 226021 [/MAP] |
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