RTU Syllabus 3rd Sem EIC

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Units Contents of the subject
Semiconductor Physics - Mobility and conductivity, Charge densities in a semiconductor, Fermi Dirac distribution, Fermi-Dirac statistics and Boltzmann
approximation to the Fermi-Dirac statistics, Carrier concentrations and Fermi levels in semiconductor, Generation and recombination of charges, Diffusion and continuity equation, Transport equations, Mass action Law, Hall effect.

Junction Diodes - Formation of homogenous and hetrojuntion diodes and their energy band diagrams, Calculation of contact potential and depletion width, VI characteristics, Small signal models of diode, Diode as a circuit element, Diode
parameters and load line concept, C-V characteristics and dopant profile.

Applications of diodes in rectifier, Clipping, Clamping circuits and voltage multipliers, Transient behavior of PN diode, Breakdown diodes, Schottky diodes, and Zener diode as voltage regulator, Construction, Characteristics and operating
principle of UJT.

Transistors - Characteristics, Current components, Current gains: alpha and
beta. Variation of transistor parameter with temperature and current level, Operating
point, Hybrid model, DC model of transistor, h-parameter equivalent circuits. CE, CB and CC configuration. DC and AC analysis of single stage CE, CC (Emitter follower) and CB amplifiers AC & DC load line, Ebers-Moll model. Biasing &
stabilization techniques. Thermal runaway, Thermal stability.

JFET & MOSFET - Construction and operation, Noise performances of FET, Parasitic of MOSFET, Small signal models of JFET & MOSFET, Biasing of JFET's & MOSFET’s, Low frequency single stage CS and CD (source follower) JFET amplifiers, FET as voltage variable resistor and FET as active load.

Small Signal Amplifiers At Low Frequency –
Analysis of BJT and FET multistage amplifier, DC and RC coupled amplifiers. Frequency response
of single and multistage amplifier, mid-band gain, gains at low and high frequency.

Analysis of DC and differential amplifiers, Miller's Theorem, use of Miller and bootstrap configuration. Cascade and cascode configuration of multistage amplifiers (CE-CE, CE-CB, CS-CS and CS-CD), Darlington pair.
RTU 3rd sem Electronic Instrumentation and Control Engineering syllabus
Units Contents of the subject
I
DEFINITION & CHARACTERISTICS OF ALGORITHMS – Structures,
Difficulties in estimating exact execution time of algorithms, Concept of complexity
of program, Asymptotic notations: Big-Oh, theta, Omega- Definitions and examples,
Determination of time and space complexity of simple algorithms without recursion,
Representing a function in asymptotic notations viz 5n2-6n=_(n2)
ARRAYS: Array as storage element, Row major & column major form of arrays,
computation of address of elements of n dimensional array
II
ARRAYS AS STORAGE ELEMENTS for representing polynomial of one or
more degrees for addition & multiplication, Sparse matrices for transposing &
multiplication, stack, queue, Dequeue, Circular queue for insertion and deletion with
condition for over and underflow, Transposition of sparse matrices with algorithms
of varying complexity (Includes algorithms for operations as mentioned)
EVALUATION OF EXPRESSION - Concept of precedence and associativity in
expressions, Difficulties in dealing with infix expressions, Resolving precedence of
operators and association of operands, Postfix & prefix expressions, conversion of
expression from one form to other form using stack (with & without parenthesis),
Evaluation of expression in infix, postfix & prefix forms using stack. Recursion
III
LINEAR LINKED LISTS - Singly, doubly and circularly connected linear linked
lists- insertion, Deletion at/ from beginning and any point in ordered or unordered
lists, Comparison of arrays and linked lists as data structures
Linked implementation of stack, queue and dequeue, Algorithms for of insertion,
deletion and traversal of stack, Queue, Dequeue implemented using linked
structures. Polynomial representation using linked lists for addition, Concepts of
Head Node in linked lists
SEARCHING - Sequential and binary search
IV
NON-LINEAR STRUCTURES - Trees definition, Characteristics concept of child,
Sibling, Parent child relationship etc, Binary tree: different types of binary trees
based on distribution of nodes, Binary tree (threaded and unthreaded) as data
structure, insertion, Deletion and traversal of binary trees, constructing binary tree
B.Tech Electronics and Communication Engineering Syllabus Page 4
from traversal results. Threaded binary Tree. Time complexity of insertion, deletion
and traversal in threaded and ordinary binary trees. AVL tree: Concept of balanced
trees, balance factor in AVL trees, insertion into and deletion from AVL tree,
balancing AVL tree after insertion and deletion. Application of trees for
representation of sets.
V
GRAPHS - Definition, Relation between tree & graph, directed and undirected
graph, representation of graphs using adjacency matrix and list. Depth first and
breadth first traversal of graphs, Finding connected components and spanning tree.
Single source single destination shortest path algorithms
SORTING - Insertion, quick, Heap, Topological and bubble sorting algorithms for
different characteristics of input data. Comparison of sorting algorithms in term of
time complexity,
NOTE:
1. Algorithm for any operation mentioned with a data structure or required to
implement the particular data structure is included in the curriculum.
Text/References:
1. Malik – Data structures using C++, Cengage Learning
2. Drozdek – Data structures and algorithms in C++ , Cengage learning
3. An introduction to data structures with applications By Jean-Paul Tremblay, P. G. Sorenson, TMH
4. Data Structures in C/C++, Horowitz, Sawhney, Galgotia
5. Gilberg & Forouzan – Data structures: A pseudocode approach with c, Cengage learning
6. Data Structures in C/C++, Tanenbaum, Pearson
7. Data Structures in C++, Weiss, Parson
Units Contents of the subject
I
NUMBER SYSTEMS, BASIC LOGIC GATES & BOOLEAN ALGEBRA -
Binary Arithmetic & Radix representation of different numbers. Sign & magnitude
representation, Fixed point representation, complement notation, various codes &
arithmetic in different codes & their inter conversion. Features of logic algebra,
postulates of Boolean algebra, Theorems of Boolean algebra. Boolean function.
Derived logic gates: Exclusive-OR, NAND, NOR gates, their block diagrams and
truth tables. Logic diagrams from Boolean expressions and vica-versa, Converting
logic diagrams to universal logic. Positive, Negative and mixed logic, Logic gate
conversion.
II
DIGITAL LOGIC GATE CHARACTERISTICS - TTL logic gate characteristics.
Theory & operation of TTL NAND gate circuitry. Open collector TTL. Three state
output logic. TTL subfamilies. MOS & CMOS logic families, Realization of logic
gates in RTL, DTL, ECL, C-MOS & MOSFET, Interfacing logic families to one
another
III
MINIMIZATION TECHNIQUES - Minterm, Maxterm, Karnaugh Map, K-map
upto 4 variables, Simplification of logic functions with K-map, conversion of truth
tables in POS and SOP form. Incomplete specified functions, Variable mapping.
Quinn-Mc Klusky minimization techniques.
IV
COMBINATIONAL SYSTEMS - Combinational logic circuit design, half and full
adder, subtractor. Binary serial and parallel adders. BCD adder. Binary multiplier.
Decoder: Binary to Gray decoder, BCD to decimal, BCD to 7-segment decoder.
Multiplexer, Demultiplexer, Encoder. Octal to binary, BCD to excess-3 encoder.
Diode switching matrix. Design of logic circuits by multiplexers, encoders, decoders
and demultiplexers.
V
SEQUENTIAL SYSTEMS - Latches, Flip-flops, R-S, D, J-K, Master Slave flip
flops. Conversions of flip-flops, Counters: Synchronous & Asynchronous ripple and
decade counters, Modulus counter, Skipping state counter, Counter design, State
diagrams and state reduction techniques, Ring counter, Counter applications,
Registers: Buffer register, Shift register.
Class: III Sem. B.Tech. Evaluation
Text/References:
1. Digital integrated electronics, By Herbert Taub, Donald L. Schilling, TMH
2. Ghoshal – Digital Electronics, Cengage Learning
3. Roth – Fundamentals of Logic design, Cengage learning
4. Digital Logic and Computer Design By M. Morris Mano, Pearson
5. Pulse Switching and Network By Millman Taub, TMH
6. Roth – Digital system design using VHDL, Cengage learning
7. Fundamentals of Digital circuits, A. Anand kumar, PHI
8. Digital Electronics, Jain and Agrawal, Genius publications
9. Leach, Digital Principles and Applications, TMH
10. Digital Electronics: Principles and Integrated Circuits, Maini, Wiley
3EC4A CIRCUIT ANALYSIS & SYNTHESIS (Common to EC & EIC)
Text/References:
1. Circuits And Networks: Analysis And Synthesis, Sudhakar, TMH
2. Sivanagaraju – Electrical circuit analysis, Cengage learning
3. Robbins – Circuit analysis : Theory and Practice, Cengage Learning
4. Electrical Networks, Singh, TMH
5. Electric Circuits, Nilsson, Pearson
6. Linear Circuits Analysis, Decarlo, Oxford
For the detailed syllabus , here is the attachment;