MSc Computer Science Part I Question papers

Will you please give me question paper for MSc Computer Science 1st semester examination of Andhra university in a PDF file format ?

[Quick Sam]

Here I am giving you question paper for MSc Computer Science 1st semester examination of Andhra university in a PDF file attached with it so you can get it easily.

1. a What is a decoder? Compare a decoder and a demultiplexer
b. Define the terms machine cycle, instruction cycle, and microprogram
c. What are the various schemes used for data transfer between processor and
Input/Output devices?
d. What does DMA stand for? Assume that a processor receives an interrupt request and a
DMA request at the same time. Which request does the processor process first? Why?
e. List the advantages of memory mapped I/O over I/O mapped I/O
f. What is a Cache memory? Give its applications
g. What are serial communication parameters?

2. a. A two level NOR-NOR realization of some expression is shown in fig. Determine the
Boolean expression and express it in SOP from. Construct The truth table of the following
circuit and realize using NAND gates
X1
F(x1,x2,x3)
X2
X3
b. Construct a 4x 1 multiplexer using logic gates. Obtain 8 X 1 multiplexer with a dual 4 line
to 1 line multiplexer having separate enable inputs but Common select lines.

3 a. Explain with examples Fixed-point representation
b. Explain Memory reference instructions of hypothetical BASIC computer
you have studied.

4 a Discuss various addressing modes in a computer with the help of examples
b Show how you can evaluate X=A+(B*C)/(D-E*F) Using a zero – address machine.

5 a Explain about control memory and address sequencing
b Distinguish between micro-programming and hard wired control
6 a Discuss clearly the general register organization of a typical CPU
b Explain in detail the Reduced Instruction Set Computer Architecture.
7 a Discuss the different methods of data transfer between the CPU and I/O Devices.
b What is an interrupt? How is it generated? How are interrupts serviced by CPU?
8 a Explain the need for memory hierarchy. Explain associative memory concepts in detail.
b Distinguish between virtual memory and main memory. Write the merits of virtual
memory.
Andhra university MSc Computer Science 1st semester paper







in for more detail in atteched file.........

Four times, should you steal your spacesuit in the Smithsonian.

Can you provide me the previous year M.Sc Computer Science question paper for Delhi University Entrance Test (DUET) for preparation of the exam?

[Neelu Bhasin]

The previous year M.Sc Computer Science question paper for Delhi University Entrance Test (DUET) for preparation of the exam is as follows:


With reference to cache memory, the hit ratio is defined as:
[Question ID = 896]
1. No. of hits / (No. of hits + No. of miss) [Option ID = 3583]
2. No. of hits / No. of miss [Option ID = 3581]
3. No. of miss / (No. of hits + No. of miss) [Option ID = 3584]
4. No. of miss / No. of hits [Option ID = 3582]


How many address/data lines are required to access 64k 8 memory? [Question ID = 897]
1. 16/8 [Option ID = 3585]
2. 8/16 [Option ID = 3587]
3. 16/16 [Option ID = 3586]
4. 8/8 [Option ID = 3588]

In a sliding window ARQ scheme, the transmitters window size is N and the receivers window size is M. The minimum number of distinct sequence numbers required to ensure correct operation of the ARQ scheme
is: [Question ID = 887]
1. max (M, N) [Option ID = 3546]
2. M + N [Option ID = 3547]
3. min (M, N) [Option ID = 3545]
4. M * N [Option ID = 3548]


Consider a disk pack with a seek time of 4 milliseconds and rotational speed of 10000 rotations per minute (RPM). It has 600 sectors per track and each sector can store 512 bytes of data. Consider a file stored in the disk. The file contains 2000 sectors. Assume that every sector access necessitates a seek, and the average rotational latency for accessing each sector is half of the time for one complete rotation. The total time (in milliseconds) needed to read the entire file is ________. [Question ID = 890]
1. 14020 [Option ID = 3559]
2. 14200 [Option ID = 3558]
3. 14400 [Option ID = 3557]
4. 14040 [Option ID = 3560]


Let the content of address part of instruction be 1234H and the content of base register be 0236H. Give the address of memory location addressed if base register addressing mode is used. [Question ID = 895]
1. 146BH [Option ID = 3580]
2. 1234H [Option ID = 3577]
3. 146AH [Option ID = 3579]
4. 1470H [Option ID = 3578]



M.Sc Computer Science Question Paper for DUET