MCA syllabus SGBAU

I have taken admission in Sant Gadge Baba Amravati University MCA programme, now I need SGBAU MCA programme syllabus, so will you please provide here???

[Shaleen]

As you need Sant Gadge Baba Amravati University MCA programme syllabus, here I am giving:

MCA

1st Year 1st SEM
1 MCA 1/ 1 CS 1 computer organization



unit I Chapter Objectives, Evaluation of Computers and computer generations, Technological trends, Measuring performance, speed up, Amdahl’s law, Von Neumann machine architecture, Functional units and components in computer organization, Program development tools, Operating systems.

Unit II from Electron to Bits, Binary representation of positive integers, Negative integers, Fixed point arithmetic operations on positive and signed (Negative) integers, Floating-Point numbers (IEEE 754 standard) and operations, BCD arithmetic operation, Design of ALU, Bit slice processors.

Unit III Concept of instruction formats and instruction set, instruction set types, types of operands and operations, Generation of memory addresses and addressing modes, Subroutine nesting using stacks to implement subroutine calls and calling conventions, Processor organizations, Register organization, Stack based organizations, Encoding of machine instructions, General features of RISC and CISC instruction sets, modern processors convergence of RISK with CISC, Processor microarchitecture-I - Fundamental concepts for data path implementation,Processor microarchitecture-II - Data path implementation, microprogrammed execution, recent innovations in execution unit design.

Unit IV Instruction pipeline, instruction pipeline hazards, overcoming hazards using a pipeline with forwarding paths, instruction set design influence on pipelining, example of pipelined CISC processor, example of pipelined RISC processor, VLIW (Very Long Instruction Word) processors, Vector processors, Multithreaded processors, Compilation techniques support to instruction level parallelism, Extracting parallelism.

Unit V Some basic concepts, memory hierarchy, internal organization of semiconductor main memory chips - RAM and ROM, semiconductor main memories - RAM, semiconductor Read - Only memories - ROMs, speed, size and cost, secondary storage magnetic ferrite core memories, optical disks CD-ROM memories, data caches, instruction caches, and unified cache, features describing a cache, cache implementations, multilevel caches.

Unit VI Virtual memory organization, mapping functions for translating the program pages in virtual to physical addresses space, partitioning, segmentation (superpages or page blocks) partitioning of virtual address space in to segment and page address, demand paging and swapping, cache and virtual swapping, cache and virtual memory, inverted page tables concept, protection between programs running on the same system, accessing I/O devices, programmed I/O, interrupts, direct memory access DMA, bus arbitration, interface circuits, I/O interfaces, I/O processors, external I/O devices.

For detailed syllabus, here is attachment: