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  #1  
17th May 2018, 05:17 PM
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JNTU Kakinada

I have heard a lot about Jawaharlal Nehru Technological University (JNTU), Kakinada and want to join here for doing higher studies. Will you provide me list and types of schools which is running under this university also provide admission details so that I plan to join here?
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  #2  
17th May 2018, 05:17 PM
Super Moderator
 
Join Date: Aug 2012
Re: JNTU Kakinada

Jawaharlal Nehru Technological University (JNTU), Kakinada is a public university, in Kakinada, East Godavari district, north of the Indian state of Andhra Pradesh.

It is one of India's leading universities focusing on engineering.

The college offers B.Tech. undergraduate and postgraduate degrees in various fields. JNTU Kakinada has established the following schools:

School of Management Studies
School of Spatial Information Technology
School of Health Sciences and Research
School of Pharmaceutical Sciences & Technologies
School of Renewable Energy & Environment
School of Food Technology
School of Biotechnology
School of Avionics
School of Soft Skills & Public Relations

Admissions

Admission into B.Tech is based on EAMCET or ECET ranks; admission into M.Tech is based on Graduate Aptitude Test in Engineering or PGECET scores; and admission into MCA is based on ICET rank.

Contact:

Registrar
P : 0884-2300900
F : 0884-2300901
e : registrar@jntuk.edu.in

Director of Evaluation
P : 0884-2300911
F : 0884-2300912
e : de@jntuk.edu.in

Director, Research and Development
P : 0884-2300992
e : director_sr@jntuk.edu.in
  #3  
20th February 2020, 08:37 PM
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Re: JNTU Kakinada

Can you provide me the syllabus for M Tech Electronics and Communications Engineering (ECE) Program offered by Jawaharlal Nehru Technological University, Kakinada (JNTU Kakinada)?
  #4  
20th February 2020, 08:39 PM
Super Moderator
 
Join Date: Aug 2012
Re: JNTU Kakinada

The syllabus for M Tech Electronics and Communications Engineering (ECE) Program offered by Jawaharlal Nehru Technological University, Kakinada (JNTU Kakinada) is as follows:

M. Tech ECE

I Year I Semester

DIGITAL SYSTEM DESIGN


UNIT-I: Minimization Procedures and CAMP Algorithm:
Review on minimization of switching functions using tabular methods, k-map, QM algorithm,
CAMP-I algorithm, Phase-I: Determination of Adjacencies, DA, CSC, SSMs and EPCs,, CAMPI algorithm, Phase-II: Passport checking, Determination of SPC, CAMP-II algorithm:
Determination of solution cube, Cube based operations, determination of selected cubes are
wholly within the given switching function or not, Introduction to cube based algorithms.


UNIT-II: PLA Design, Minimization and Folding Algorithms:
Introduction to PLDs, basic configurations and advantages of PLDs, PLA-Introduction, Block
diagram of PLA, size of PLA, PLA design aspects, PLA minimization algorithm(IISc algorithm),
PLA folding algorithm(COMPACT algorithm)-Illustration of algorithms with suitable examples.


UNIT -III: Design of Large Scale Digital Systems:
Algorithmic state machine charts-Introduction, Derivation of SM Charts, Realization of SM
Chart, control implementation, control unit design, data processor design, ROM design, PAL
design aspects, digital system design approaches using CPLDs, FPGAs and ASICs.


UNIT-IV: Fault Diagnosis in Combinational Circuits:
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.


UNIT-V: Fault Diagnosis in Sequential Circuits:
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.


TEXT BOOKS:
1. Logic Design Theory-N. N. Biswas, PHI
2. Switching and Finite Automata Theory-Z. Kohavi , 2nd Edition, 2001, TMH
3. Digital system Design using PLDd-Lala


REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.


Syllabus M Tech Electronics and Communications Engineering (ECE) JNTU Kakinada






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