ISRO Solved Papers for Electronics

I have completed B.Tech Degree with Electronics and Communication Engineering discipline. Now I want to apply for ISRO Exam. So I am searching for solved question papers of Electronics discipline for ISRO Exam. So will you give solved question papers?

[Rajkumar Agarwal]

As you are looking for solved question papers of ISRO Exam in Electronics discipline, so here are question papers:

ISRO Exam Electronics Question Paper:
1. How does the dynamic resistance of diode vary with temperature?
a. Directly proportional
b. Inversely proportional
c. Independent
d. Directly to the square of temperature

2. The electric field component of a time harmonic plane EM wave traveling in a non-magnetic lossless dielectric medium has amplitude of 2 V/m. If the relative permittivity of the medium is 4, the magnitude of the time average power density vector in W/m2 is
a. 1/30π
b. 1/120π
c. 1/60π
d. 1/240π

3. The force on a point charge +q kept at a distance ‘d’ from the surface of an infinite grounded metal plate in a medium of permittivity ε is
a. 0
b. q2/16πεd2 away from the plate
c. q2/16πεd2towards the plate
d. q2/4πεd2 towards the plate

4. A material has conductivity of 10-2 mho/m and a relative permittivity of 4. The frequency at which the conduction current in the medium is equal to the displacement current is
a. 45 MHz
b. 90 MHz
c. 450 MHz
d. 900 MHz

5. A system has fourteen poles and two zeros. Its high frequency asymptote in its magnitude plot having a slope of
a. – 40 dB/decade
b. – 240 dB/decade
c. – 280 dB/decade
d. – 320 dB/decade

6. A 1mW video signal having a bandwidth of 100 MHz is transmitted to a receiver through a cable that has 40 dB loss. If the effective one sided noise spectral density at the receiver is 10-20 Watt/Hz, then the signal to noise ratio at the receiver is
a. 50 dB
b. 30 dB
c. 40 dB
d. 60 dB

7. When the 8051 is reset and the line is HIGH, the program counter points to the first program instruction in the
a. Internal code memory
b. External code memory
c. Internal data memory
d. External data memory

8. How is the status of the carry, auxiliary carry and parity flag affected after executing instructions?
MOV A, #9CH
ADD A, #64H
a. CY = 0, AC = 0, P = 0
b. CY = 1, AC = 1, P = 0
c. CY = 0, AC = 1, P = 0
d. CY = 1, AC = 1, P = 1

9. In the given combinational logic, X is given by

10. Each transistor in Darlington pair (as shown in Fig) has hfe = 100. Overall hfe of composite transistor neglecting leakage current is,
a. 10000
b. 10001
c. 10100
d. 10200

11. In a given network shown in figure, a steady state is reached with switch ‘k’ open. At t=0, which is closed. Determine the values of I1, I2 and I3 at t = 0+ (in Amperes).
a. 1, 1/3, 0
b. 1/3, 1/3, 1/3
c. 0, 0, 0
d. 1, 1, 1

12. Simplify Boolean function represented in sum of products of min-terms, F(x,y,z) = ∑m(0,2,4,5,6)

13. A system is described by the transfer function H(s) = 1/(S3 + αS2 + kS + 3) is stable. The constraints on α and k are
a. α > 0, αk < 3
b. α > 0, αk > 3
c. α > 0, αk > 0
d. α > 0, αk < 0

14. Consider a unity feedback system whose open loop transfer function is G(s) = k/s(s2 + 2s +2). The Nyquist plot for this system is

15. Eye diagram gives an idea of
a. Modulation scheme
b. Clock jitter
c. SNR
d. All of the above

16. The signal flow diagram for a certain feedback control system is shown in figure.
Now consider the following set of equations for the nodes.
1. x2 = a1x1 + 19x3
2. x3 = a2x2 + a8x4
3. x4 = a3x3 + a5x2
4. x5 = a4x4 + a6x2

Which of the following are correct?
a. 1, 2 and 3
b. 1, 3 and 4
c. 2, 3 and 4
d. 1, 2 and 4

17. The appropriate output frequency of 555 oscillator for RA = RB = 2.2 kΩ and C = 2000 pF
a. 110 kHz
b. 109.3 kHz
c. 120.5 kHz
d. 108.9 kHz

18. A counter is designed using J-K flip flop as shown in figure.
Define its count sequence
a. 000, 001, 010, 011, 100 & repeats
b. 100, 011, 010, 001, 000 & repeats
c. 010, 011, 100, 000, 001 & repeats
d. 101, 110, 111, 000, 001, 010, 011, 100 & repeats

19. A 1 MHz clock signal is applied to a J-K flip flop with J=K=1. What is the frequency of the flip flop output signal?
a. 2 MHz
b. 500 kHz
c. 250 kHz
d. 500 MHz

20. How many inputs and outputs does a full adder have?
a. 3,2
b. 2,3
c. 3,3
d. 2,2

21. Which shift register counter requires the most decoding circuitry?
a. Jhonson counter
b. Ring counter
c. Ripple counter
d. MOD counter

22. A 10 bit DAC has step size of 10mV. What is its Full scale output voltage and the percentage resolution?
a. 10.24 V, 0.2 %
b. 10.23 V, 0.5 %
c. 10.23 V, 0.1 %
d. 10.24 V, 0.1 %

23. If the input signals A , B and output signals are shown as below,
then the circuit element is
a. AND gate
b. OR gate
c. NOR gate
d. XOR gate

24. For a 10 bit digital ramp ADC using 500 kHz clock, the maximum conversion time is
a. 2048